Benchmark ADC16 Datenblatt Seite 10
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- Inhaltsverzeichnis
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ST72334J/N, ST72314J/N, ST72124J
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PIN DESCRIPTION (Cont’d)
For external pin connection guidelines, refer to Section 16 "ELECTRICAL CHARACTERISTICS" on page
107.
Legend / Abbreviations for Table 1:
Type: I = input, O = output, S = supply
Input level: A = Dedicated analog input
In/Output level: C = CMOS 0.3V
DD
/0.7V
DD
,
C
T
= CMOS 0.3V
DD
/0.7V
DD
with input trigger
Output level: HS = 20mA high sink (on N-buffer only)
Port and control configuration:
– Input: float = floating, wpu = weak pull-up, int = interrupt
1)
, ana = analog
– Output: OD = open drain
2)
, PP = push-pull
Refer to Section 12 "I/O PORTS" on page 39 for more details on the software configuration of the I/O
ports.
The RESET configuration of each pin is shown in bold. This configuration is valid as long as the device is
in reset state.
Table 1. Device Pin Description
Pin n°
Pin Name
Type
Level Port
Main
function
(after
reset)
Alternate function
TQFP64
SDIP56
QFP44
SDIP42
Input
Output
Input Output
float
wpu
int
ana
OD
PP
1 49 PE4 (HS) I/O C
T
HS X X X X Port E4
2 50 PE5 (HS) I/O C
T
HS X X X X Port E5
3 51 PE6 (HS) I/O C
T
HS X X X X Port E6
4 52 PE7 (HS) I/O C
T
HS X X X X Port E7
5 53 2 39 PB0 I/O C
T
X ei2 X X Port B0
6 54 3 40 PB1 I/O C
T
X ei2 X X Port B1
7 55 4 41 PB2 I/O C
T
X ei2 X X Port B2
8 56 5 42 PB3 I/O C
T
X ei2 X X Port B3
9 1 6 1 PB4 I/O C
T
X ei3 X X Port B4
10 2 PB5 I/O C
T
X ei3 X X Port B5
11 3 PB6 I/O C
T
X ei3 X X Port B6
12 4 PB7 I/O C
T
X ei3 X X Port B7
13 5 7 2 PD0/AIN0 I/O C
T
X X X X X Port D0 ADC Analog Input 0
14 6 8 3 PD1/AIN1 I/O C
T
X X X X X Port D1 ADC Analog Input 1
15 7 9 4 PD2/AIN2 I/O C
T
X X X X X Port D2 ADC Analog Input 2
16 8 10 5 PD3/AIN3 I/O C
T
X X X X X Port D3 ADC Analog Input 3
17 9 11 6 PD4/AIN4 I/O C
T
X X X X X Port D4 ADC Analog Input 4
18 10 12 7 PD5/AIN5 I/O C
T
X X X X X Port D5 ADC Analog Input 5
19 11 PD6/AIN6 I/O C
T
X X X X X Port D6 ADC Analog Input 6
20 12 PD7/AIN7 I/O C
T
X X X X X Port D7 ADC Analog Input 7
21 13 13 8 V
DDA
S Analog Power Supply Voltage
22 14 14 9 V
SSA
S Analog Ground Voltage
23 V
DD_3
S Digital Main Supply Voltage
- ST72334J/N 1
- ST72314J/N, ST72124J 1
- Table of Contents 2
- 2 INTRODUCTION 6
- 3 PIN DESCRIPTION 7
- (N versions) 8
- (J versions) 9
- 4 REGISTER & MEMORY MAP 13
- 5 FLASH PROGRAM MEMORY 17
- 6 DATA EEPROM 18
- Interrupt enable 21
- Latch Access Transfer 21
- 8 CENTRAL PROCESSING UNIT 23
- Half carry 24
- Interrupt mask 24
- Negative 24
- Carry/borrow 24
- 00000001 25
- MAIN CLOCK 26
- CONTROLLER 26
- ■ an external source 30
- ■ an external RC oscillator 30
- LVD reset flag 32
- Clock security syst 32
- interrupt enable 32
- Watchdog reset flag 32
- 10 INTERRUPTS 33
- INTERRUPTS (Cont’d) 34
- Table 5. Interrupt mapping 34
- 11 POWER SAVING MODES 35
- 12 I/O PORTS 39
- Hardware Configuration 41
- OPEN-DRAIN OUTPUT 41
- PUSH-PULL OUTPUT 41
- Data register 8 bits 44
- Option register 8 bits 44
- I/O PORTS (Cont’d) 45
- 13 MISCELLANEOUS REGISTERS 46
- Main clock out selection 47
- CPU clock prescaler 47
- Slow mode select 47
- Must always be cleared 48
- Beep control 48
- SS mode selection 48
- SS internal mode 48
- 14 ON-CHIP PERIPHERALS 49
- Activation bit 50
- 7-bit timer (MSB to LSB) 50
- Watchdog flag 50
- WATCHDOG TIMER (Cont’d) 51
- Time base control 53
- Oscillator interrupt enable 53
- Oscillator interrupt flag 53
- clock speed) with the choice 54
- 16-BIT TIMER (Cont’d) 55
- Beginning of the sequence 56
- Sequence completed 56
- /CC[1:0]) 58
- 16-BIT FREE RUNNING 59
- OLVL2OLVL1 64
- Pulse Width Modulation cycle 65
- Input Capture Flag 1 69
- Output Compare Flag 1 69
- Timer Overflow Flag 69
- Input Capture Flag 2 69
- Output Compare Flag 2 69
- CAPTURE STROBE 77
- VR02131B 77
- Write Collision status 83
- Mode Fault flag 83
- TDRE TC RDRF IDLE OR NF FE 93
- R8 T8 - M WAKE - 94
- TIE TCIE RIE ILIE TE RE RWU 94
- First SCI Prescaler 95
- SCI Transmitter rate divisor 95
- SCI Receiver rate divisor 95
- 8-bit Extended Receive Pres 96
- 8-bit Extended Transmit Pres 96
- CH2 CH1CH3COCO 0 ADON 0 CH0 97
- ■ A/D conversion [duration: t 98
- D7 D6 D5 D4 D3 D2 D1 D0 99
- COCO 0 ADON 0 CH3 CH2 CH1 CH0 99
- 15 INSTRUCTION SET 101
- Relative (Indirect) 103
- INSTRUCTION GROUPS (Cont’d) 105
- 16 ELECTRICAL CHARACTERISTICS 107
- 16.6 MEMORY CHARACTERISTICS 122
- 16.6.2 EEPROM Data Memory 122
- 16.6.3 FLASH Program Memory 122
- R=10k~10MΩ 124
- UNUSED I/O PORT 128
- ADC Accuracy 139
- 17 PACKAGE CHARACTERISTICS 140
- ■ Heraeus: PD945, PD955 143
- ■ Loctite: 3615, 3298 143
- MICROCONTROLLER OPTION LIST 146
- DEVELOPMENT TOOLS (Cont’d) 148
- 18.4 ST7 APPLICATION NOTES 149
- 19 IMPORTANT NOTES 151
- 20 SUMMARY OF CHANGES 152
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